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Author Said, Silvia, author.
Title Low power ASIC design : a comparative study / by Silvia Said.
Published [Northridge, California] : California State University, Northridge, 2012.
LOCATION CALL # STATUS
 Electronic Book  TA153 .Z953 2012 S25eb    ONLINE
  
Description 1 online resource (x, 187 pages) : illustrations, color.
Content Type text
still image
Format online resource
File Characteristics text file PDF
Thesis M.S. California State University, Northridge 2012.
Bibliography Includes bibliographical references (page 148).
Summary The main objective of this project is to successfully complete a comparative study of an ASIC design flow using 90 nm SYNOPSYS Design Compiler (DC) to generate the net list of the physical design and then use SYNOPSYS IC Compiler to perform the placement and optimization followed by clock tree synthesis, routing and lastly chip design. This project gives an overview of different types of ASIC, front end and back end design using SYNOPSYS Design Compiler and IC compiler flow. In this project FIFO design flow will be done through the entire flow two times. Firstly, without applying any power techniques optimization through the front end as well as in the back end, and secondly, by applying the low power techniques that can be implemented within SYNOPSYS in the front end as well as in the back end. First synthesis is done in the front end using SYNOPSYS Design Compiler and net list is generated. Then the physical implementation of the design is done using SYNOPSYS IC Compiler. Power optimization using RTL level optimization and setting up power constraints is mainly considered.
Note Description based on online resource; title from PDF title page (viewed on June 01, 2012).
Subject Application-specific integrated circuits -- Design.
Local Subject Dissertations, Academic -- CSUN -- Engineering -- Electrical and Computer Engineering.
Alternate Title Low power application specific integrated circuit design : a comparative study
OCLC number 849055236